Huawei successfully managed to obtain chip dependency by utilizing SMIC’s 7nm process for its Kirin 9000S, which debuted in the Mate 60 flagship lineup, and there were whispers doing the rounds that China’s biggest semiconductor firm had successfully developed the 5nm process in the first half of 2024.
However, it appears that the company ran into a few snags along the way, primarily because it does not have access to the advanced EUV equipment which would allow it to pursue the mass production of wafers on a much more sophisticated lithography. However, it needs to find a way past the 7nm ceiling, and according to a new report, SMIC will complete its 5nm chip development in 2025.
The result of using older DUV equipment will allow SMIC to reach its 5nm goals, but aside from the increased costs, the yields are said to be a measly one-third of TSMC’s figure on the same technology
Data published by Kiwoom Securities and spotted by tipster @Jukanlosreve mentions when SMIC is slated to complete its 5nm chip development. With Huawei’s Mate 70 series’s Kirin 9020 said to be mass produced on the 7nm lithography, one can immediately assume that the Chinese foundry was running into various obstacles with its 5nm node. The report hints that while it is entirely possible for SMIC to successfully achieve its ambitious goal, it will endure a wave of hiccups.
For instance, SMIC’s 5nm wafers will reportedly be up to 50 percent more expensive than TSMC’s on the same manufacturing process, with the yields said to reach a measly 33 percent. The price of these chips is a topic that we have discussed previously, while also mentioning that this increased sum is the result of using the older-generation DUV equipment instead of EUV, which requires additional patterning to achieve this lithography successfully.
SMIC plans to complete the development of its 5nm process by 2025.
They achieved mass production of the 7nm (N+2) process without EUV and completed the development of the 5nm process to support the mass production of the Huawei Ascend 910C.
The cost of SMIC’s 5nm process is…
— Jukanlosreve (@Jukanlosreve) March 26, 2025
The additional steps will not just require more time to churn out 5nm wafers but reduce SMIC’s yields, resulting in a higher number of ‘bad batches.’ Perhaps the only way out of this semiconductor rabbit hole is for the Chinese firm to cross its fingers and hope that the state successfully develops its first EUV machines, which will reportedly enter trial production in Q3 2025. SiCarrier, another Chinese equipment manufacturer linked to Huawei, is said to be working on various suitable replacements for ASML that will allow the region to successfully commence the full-scale production of advanced semiconductors.
There is no telling when SMIC will produce 5nm wafers in higher quantities, but @Jukanlosreve’s post mentions that this technology will be leveraged by Huawei to use for its Ascend 910C, the company AI chip designed to reduce China’s dependency on NVIDIA. With the locally made EUV machinery, SMIC has the opportunity to pursue even more cutting-edge nodes, but we will update our readers on where its progress stands with its 5nm process in a couple of weeks.
News Source: @Jukanlosreve
